李建华  (副研究员)

出生日期：1985-08-11

所在单位：计算机科学与技术系

职务：Associate Professor

学历：博士研究生毕业

办公地点：翡翠科教楼A806

性别：男

学位：博士学位

在职信息：在职

毕业院校：中国科学技术大学

学科：计算机应用技术
计算机系统结构

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个人简介

学习工作经历：

  • 2007年于安庆师范大学获取计算机科学与技术专业学士学位；

  • 2013年获得中国科学技术大学软件与理论专业博士学位，香港城市大学电脑科学博士学位；

  • 2013年8月起在合肥工业大学计算机与信息学院工作。

  • 2016-2018，香港城市大学，香江学者。


讲授课程：

  • 本科生，计算机体系结构、云计算技术、系统硬件综合设计；

  • 研究生：高级计算机体系结构、深入理解计算机系统；


研究方向：

  • 计算机系统结构，包括片上存储系统优化、缓存一致性协议、片上网络、FPGA开发和应用等。

  • 欢迎对 硬件和系统方向感兴趣，且实际动手能力较好的同学联系：jhli AT hfut.edu.cn


论文发表：

  • Yiming Ouyang, Shuaijie Yuan, Jianhua Li, Huaguo Liang, F-Bypass: A Low-Power Network-on-Chip Design Utilizing Bypass to Improve Network Connectivity. ACM J. Emerg. Technol. Comput. Syst. 20(4): 14:1-14:26 (2024)

  • Wu Zhou, Yiming Ouyang, Jianhua Li, Dongyu Xu, A transparent virtual channel power gating method for on-chip network routers. Integr. 88: 286-297 (2023)

  • Yu Gu, Xiang Zhang, Yantong Wang, Meng Wang, Huan Yan, Yusheng Ji, Zhi Liu, Jianhua Li, Mianxiong Dong, WiGRUNT: WiFi-Enabled Gesture Recognition Using Dual-Attention Network. IEEE Trans. Hum. Mach. Syst. 52(4): 736-746 (2022)

  • Y.Ouyang , Q. Wang , M. Ru , H. Liang , J. Li, A Novel Low-Latency Regional Fault-Aware Fault-Tolerant Routing Algorithm for Wireless NoC, IEEE Access 8, 2020.

  • F. Shen, Y. He, J. Zhang, Q. Li, J. Li , C.Xu, Reuse locality aware cache partitioning for last-level cache, Comput. Electr. Eng. 74: 319-330, 2019.

  • Y. Ouyang , Y. Zhao, K. Xing, Z. Huang, H. Liang, J. Li, Design of Wireless Network on Chip with Priority-Based MAC, Journal of Circuits, Systems, and Computers 28(8): 1950124:1-1950124:18, 2019.

  • Y. Ouyang, Z.Li, K. Xing, Z. Huang, H. Liang, J. Li, Design of Low-Power WiNoC with Congestion-Aware Wireless Node. Journal of Circuits, Systems, and Computers 27(9): 1850148:1-1850148:18, 2018.

  • Hu Wan, Fuyang Li, Zimeng Zhou, Kaisheng Zeng, Jianhua Li, Chun Jason Xue, NVLH: Crash-Consistent Linear Hashing for Non-Volatile Memory, NVMSA, 2018.

  • J Li, M Li, CJ Xue, Y Ouyang, F Shen, Thread criticality assisted replication and migration for chip multiprocessor caches, IEEE Transactions on Computers 66 (10), 1747-1762, 2017.

  • He, J Zhang, N Jiang, J Li, Feedback learning based dead write termination for energy efficient stt-ram caches, F Shen, Y Chinese Journal of Electronics 26 (3), 460-467, 2017.

  • J Li, X An, Y Ouyang, Thread progress aware block migration for dynamic NUCA, 24th Euromicro International Conference on Parallel, Distributed, and Network based Processing, 2016.

  • Q Li, Y He, J Li, L Shi, Y Chen, CJ Xue, Compiler-assisted refresh minimization for volatile STT-RAM cache, IEEE Transactions on Computers 64 (8), 2169-2181, 2015.

  • L Shi, J Li, Q Li, CJ Xue, C Yang, X Zhou, A unified write buffer cache management scheme for flash memory, IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22(12), 2779-2792, 2014.

  • J Li, L Shi, CJ Xue, Y Xu, Dual partitioning multicasting for high-performance on-chip networks, Journal of Parallel and Distributed Computing 74 (1), 1858-1871, 2014.

  • J Li, L Shi, CJ Xue, Y Xu, Thread progress aware coherence adaption for hybrid cache coherence protocols, IEEE Transactions on Parallel and Distributed Systems 25 (10), 2697-2707, 2014.

  • J Li, L Shi, Q Li, CJ Xue, Y Chen, Y Xu, W Wang, Low-energy volatile STT-RAM cache design using cache-coherence-enabled adaptive refresh, ACM Transactions on Design Automation of Electronic Systems (TODAES) 19 (1), 2014.

  • Q Li, J Li, L Shi, M Zhao, CJ Xue, Y He, Compiler-assisted STT-RAM-based hybrid cache for energy efficient embedded systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (8), 2013.

  • J Li, L Shi, CJ Xue, Y Chen, Y Xu, Cache coherence enabled adaptive refresh for volatile STT-RAM, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013.

  • Y Huang, L Shi, J Li, Q Li, CJ Xue, WCET-aware re-scheduling register allocation for real-time embedded systems with clustered VLIW architecture, IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (1), 168-180, 2013.

  • L Shi, J Li, C Jason Xue, X Zhou, Hybrid nonvolatile disk cache for energy-efficient and high-performance systems, ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (1), 2013.

  • J Li, L Shi, Q Li, CJ Xue, Y Xu, Teaca: Thread progress aware coherence adaption for hybrid coherence protocols, IEEE 10th Symposium on Embedded Systems for Real-time Multimedia, 19-26, 2012.

  • Q Li, L Shi, J Li, CJ Xue, Y He, Code motion for migration minimization in STT-RAM based hybrid cache, IEEE Computer Society Annual Symposium on VLSI, 410-415, 2012.

  • W Tian, Y Zhao, L Shi, Q Li, J Li, CJ Xue, M Li, E Chen, Task allocation on nonvolatile-memory-based hybrid main memory, IEEE transactions on very large scale integration (VLSI) systems 21 (7), 2012.

  • Q Li, J Li, L Shi, CJ Xue, Y He, MAC: migration-aware compilation for STT-RAM based hybrid cache in embedded systems, Proceedings of the ACM/IEEE international symposium on Low power electronics and design, 351-356, 2012.

  • L Shi, J Li, CJ Xue, X Zhou, Cooperating virtual memory and write buffer management for flash-based storage systems, IEEE transactions on very large scale integration (VLSI) systems 21 (4), 706-719, 2012.

  • W Tian, J Li, Y Zhao, CJ Xue, M Li, E Chen, Optimal task allocation on non-volatile memory based hybrid main memory, ACM Symposium on Research in Applied Computation, 1-6, 2011.

  • J Li, L Shi, CJ Xue, C Yang, Y Xu, Exploiting set-level write non-uniformity for energy-efficient NVM-based hybrid cache, 9th IEEE Symposium on Embedded Systems for Real-Time Multimedia, 19-28, 2011.

  • L Shi, J Li, CJ Xue, C Yang, X Zhou, ExLRU: A unified write buffer cache management for flash memory, Proceedings of the Ninth ACM International Conference on Embedded Systems, 2011.

  • J Li, CJ Xue, Y Xu, STT-RAM based energy-efficiency hybrid cache for CMPs, IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 31-36, 2011.

  • J Li, CJ Xue, Y Xu, LADPM: Latency-aware dual-partition multicast routing for mesh-based network-on-chips, IEEE 16th International Conference on Parallel and Distributed Systems, 2010.


中文论文：

  • 欧阳一鸣,王奇,汤飞扬,周武,李建华.MRNDA：一种基于资源受限片上网络的深度神经网络加速器组播机制研究[J].电子学报,2024,52(03):872-884.

  • 周义涛,李阳,韩超,赵玉来,汪玲,李建华.适用于S-NUCA异构处理器的任务调度与热管理系统[J].计算机工程,2024,50(02):196-205.

  • 李悦瑶,胡海洋,王奇,安鑫,李建华.基于动态调整的弹性片上网络路由算法[J].智能计算机与应用,2022,12(10):1-14.

  • 焦童,陈玲玲,安鑫,李建华.基于重用信息的非易失性缓存动态旁路策略[J].计算机工程,2021,47(04):158-165.

  • 欧阳一鸣,贾博远,李建华,黄正峰,梁华国.WiNoC中无线通信拥塞与故障感知的容错路由算法[J].电子学报,2020,48(04):662-669.

  • 欧阳一鸣,钱昌,杜高明,黄正峰,李建华.WiNoC中EF-ACK容错无线接口设计[J].电子学报,2018,46(11):2561-2570.






教育经历

[1]   2008.9-2013.7

中国科学技术大学  |  计算机软件与理论  |  博士学位  |  博士研究生毕业

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