Supervisor of Master's Candidates
School/Department:Hefei University of Technology
Education Level:Postgraduate (Doctoral)
Gender:Female
Degree:Doctoral degree
Status:Employed
Academic Titles:Associate Professor in the School of Computer and Information
Alma Mater:Hefei University of Technology
Discipline:Computer Architecture
Computer Applications Technology
Other specialties in Software Engineering
Teaching Information
系统硬件综合设计
Course Introduction:基于先修课程，根据系统设计思想，使用Verilog HDL 设计实现一款MIPS32或RISC-V等指令集架构的处理器（CPU），完成单周期CPU设计、多周期CPU设计和5级流水线CPU设计（递进式、难度依次提升。所有学生必须至少完成单周期CPU的设计工作），并将设计的CPU，下载至FPGA开发板上运行。以此贯穿数字逻辑、计算机组成原理、计算机体系结构课程，实现从逻辑门至完整CPU处理器的设计。
Teacher:陈田
School Year:2023-2024
Semester:Autumn Term
Course number:0509063B
Credits:2.0
Course Type:Undergraduate Course:
Top-Quality Courses or Not:no
Maximum Number of Students:153
Required Class Hours:36.0